Project 4, Part 3: Full Physical Verification and Signoff

Every check in this article has been run before somewhere in this module, so nothing here is new. What is new is running all of it on a design that needed two real interventions to get here. Both the routability fix and the timing ECO left their marks on the layout, and this is where we find out whether either of them broke something.

DRC

Magic’s DRC on runs/cpu_run1/final/gds/cpu_top.gds, with the script from Module 8.1:

COUNT: 0

Clean. The extra routing passes really resolved the congestion rather than leaving a fragile result.

Fill

Section 8.5 separated two kinds of fill, and both apply here. The fill insertion step placed decap and filler cells in every empty row site, and check_placement confirms the rows are complete. The metal density check on the routing layers shows what we saw on the UART: met1 and met2 are dense enough everywhere, while met3 to met5, carrying only the longer routes and the power straps, have many windows below the minimum. No window is above the maximum. As in Module 8.5, the dummy metal fill for those windows is added at tapeout, and this goes into the signoff report as a condition.

LVS

The real question for this LVS run is whether the ECO, a set of resizes and one inserted buffer, is reflected in the netlist being compared.

netgen -batch lvs \
  "cpu_top_extracted.spice cpu_top" \
  "runs/cpu_run1/final/pnl/cpu_top.pnl.v cpu_top" \
  "$PDK_ROOT/sky130A/libs.tech/netgen/sky130A_setup.tcl" \
  lvs_cpu_top.report

Final result: Circuits match uniquely.

It matches, because the ECO was made in the OpenROAD database and the final netlist was written from that database afterwards: the buffer is in both, and each resized gate is the same, larger cell on both sides. Had the ECO been made on the layout alone, Netgen would have reported both the extra buffer and a different cell type at each resized instance.

What LVS does not tell you is whether the chosen sizes were good ones. It checks that the layout matches the netlist, not that the netlist is well sized; that is timing’s job, and it is why the multi-corner STA is re-run after every ECO.

Antenna, timing and IR drop

Antenna:                         0 violating nets
Worst setup slack, all corners:  +0.09 ns (ss)
Worst hold slack, all corners:   +0.05 ns (ff)
Worst static IR drop on VPWR:    7.0 mV

The timing numbers are unchanged from the previous article, since filler and decap cells do not touch any timing path. The IR drop, 7.0 mV, is a little above the 6 mV floorplan estimate, as expected once the real routing and the real cell placement are known, and still far inside the budget.

The signoff report

A report with real problems found and fixed along the way, like this one, is a more typical outcome for a real design than Project 1’s clean first run. A review team would generally trust this report more than a suspiciously smooth one for a design this size, precisely because it shows where the problems were and what was done about them, and it states plainly where the margin is thin.

Everything at once

This project was the sum of Modules 1 to 9: real utilisation pressure from Module 3, a real congestion problem from Module 4, a real clock tree from Module 5, extra routing passes from Module 6, a slow-corner setup violation closed with a Module 7 ECO, and a full Module 8 verification that had to confirm the ECO reached the netlist. None of it was a new idea. All of it was a familiar idea meeting a design big enough to make it matter.

Practice Exercise

The report says one setup violation was found and fixed in two steps, while the timing reports in the previous article showed three different slack values for that path. Is it more accurate to call this one violation fixed in two steps, or several violations? Justify the answer in terms of what STA reports.

Project 4 closes with the most complete signoff of the course, built on real problems and real fixes. Project 5 turns the pattern round one last time: no building at all, just a design that has already been through the flow, three failing reports, and the job of working out what went wrong.